View TJ49300GDP_4476555.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

tj49300 3.0a very low input / output voltage ultra low dropout linear regulator february 201 1 htc 1 htc korea f eatures ? ultra low dropout voltage ? low quiescent current ? excellent line and load regulation ? guaranteed output current of 3.0a ? available in sop - 8 - pp , to - 252, and to - 263 packages ? adjustable output voltage down to 0.8v ? fixed output voltages : 0.8v, 1.0v and 1.2v ? logic controlled shutdown option ? over - temperature/over - current protection ? - 40 c to 125 c junction temperature range application s ? motherboards and graphic card s ? microprocessor power supplies ? peripheral cards ? low voltage digital ics ? high efficiency linear regulators ? smps post regulators descripsion the tj 49300 is a series of 3.0a high performance ultra l ow dropout linear regulator ideal for powering core voltages of low - power microprocessors. the tj 49300 implements a dual supply configuration allowing for very low output impedance. the tj 49300 requires a bias input supply and a main input supply, allowing for very low input voltages on the main supply rail. the input supply operates from 1.4v to 5.5v and the bias supply requires between 3v and 5.5 v for proper operation. the tj 49300 offers fixed output voltages 1.0v and 1.2 v and adjust able output voltages down to 0.8 v. the tj 49300 is developed on a cmos technology that allows low quiescent current opera tion independent of output current. this technology also allows the tj 49300 to operate under extremely low dropout conditions. sop -8-pp t o252 -5l to -263-5l ordering information device package tj 49300gdp - x.x sop -8-pp tj 49300 grs - x.x to -252-5l tj 4930 0gr - x.x to -263-5l x.x = output voltage = adj, 1.0 and 1.2
tj49300 february 201 1 htc 2 absolute maximum ratings characteristic symbol min. max. unit input supply voltage (survival) v in -0.3 6 v bias supply voltage (survival) v bias -0.3 6 v enable input voltage (survival) v en -0.3 6 v output voltage (survival) v out -0.3 v in +0.3 v lead temperature (soldering, 5 sec) t sol 260 c storage temperature range t stg -65 150 c recommended operating r atings characteristic symbol min. max. unit input supply voltage v in 1.4 5.5 v bias supply voltage v bias 3 5.5 v enable input voltage v en 0 v bias v ambient temperature range t aopr -40 105 c operating junction temperature range t jopr -40 125 c the r mal information thermal metric jc ja unit thermal resistance (sop -8- pp) * 15 75 c/w thermal resistance (to -252- 5l) * 68 c/w thermal resistance (to -263- 5l) * 45 c/w * calculated from package in still air, mounted to m inimum foot print pcb(1 oz., 2 - layer). o rdering information v out package order no. description marking complian ce status adj sop -8-pp TJ49300GDP - adj 3.0a, adjustable tj49300g rohs, halogen free active to -252 5l tj49300grs - adj 3.0a, adjustable tj49300g rohs, halogen free active to -263 5l tj49300gr - adj 3.0a, adjustable tj49300g rohs, halogen free active 1.0v contact us 1.2v contact us
tj49300 february 201 1 htc 3 pin configuration sop - 8 - pp to - 252- 5l / to - 263- 5l pin description pin no. pin name pin function sop -8-pp to252 - 5l / to263-5l 1 1 adj / en output adjust for adjustable output . chip enable for fixed output (fixed version only ) . 2 2 in power input . 8 3 gnd reference ground. 3 4 out power output . 4 5 bias input bias voltage for powering all circuitry on the regulator except the output power tr. 5, 6, 7 - nc no connection . - - thermal exposed pad / tab connect to g round . adj / en in out bias thermal exposed pad gnd nc nc nc adj / en in gnd out bias tab
tj49300 february 201 1 htc 4 block diagram bandgap reference enable current limit thermal protection bias in en / adj gnd out adj fixed fixed adj
tj49300 february 201 1 htc 5 typical application * see application information for the details over external capacitor. * * tj 49300 can deliver a continuous current of 3.0a over the full operating temperature. however, the output current is limited by the restriction of power dissipation which differs from packages. a heat sink may be required depending on the maximum power dissipation and maximum ambient temperature of ap plication. with respect to the applied package, the maximum output current of 3.0a may be still undeliverable. *** for the details, s ee application information . r 1 r 2 v in v out c out v bias c in c bias c ff r 1 r 2 v in v out c out v bias c in c bias v in v out c out v bias c in c bias in bias out en gnd v in v out c out v bias c in c bias v en in bias out adj gnd in bias out adj gnd in bias out adj gnd
tj49300 february 201 1 htc 6 electrical characteristics limits in standard typeface are for tj=25 , and limits in boldface type apply over the full operating temperature range . unless otherwise specified: v bias = v o(no m. ) + 2.1 v, v in = v o(nom . ) + 1v, v en =v bias , i l = 10 ma. parameter symbol test condition min. t y p. max. unit output voltage tolerance (note 1 ) v o 10 ma < i l < 3.0 a v out +1 v < v in < 5.5 v -2 - 3 2 3 % adjustable pin voltage (note 2 ) v adj v out +1 v < v in < 5.5 v 0.78 0. 772 0.8 0.82 0.828 v line regulation (note 3 ) v line v out +1 v < v in < 5.5 v 0.02 0.1 %/v load regulation (note 3 , 4 ) v load 10 ma < i l < 3.0 a 0.25 1. 0 % dropout voltage v drop i l = 1.5 a 150 200 300 mv i l = 3.0 a 300 400 500 dropout voltage (note 5 ) v drop i l = 3.0 a 1.5 2.1 v bias pin current i bias i l = 3.0 a 0.55 1.0 1.5 ma ground pin current (note 6 ) i gnd1 i l = 10 m a 0.55 1.0 1. 5 ma i l = 3.0 a 0.55 1.0 1.5 ground pin current (note 6 , 1 ) i gnd2 v en < 0.2 v 0.1 0.5 1.0 ua thermal shutdown temperature t sd 160 c thermal shutdown hysteresis t sd 30 c enable threshold (note 1 ) logic low v il output = low 0.4 v logic high v ih output = high 0.7 * v bias v enable pin input current (note 1 ) i en v en = v bias 0.1 1.0 ua adjust pin current (note 2 ) i adj v adj = 0.8 v 0.01 0.1 u a note 1. fixed output voltage version only. note 2. adjustable output voltage version only. note 3. output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the input l ine voltage. output voltage load regulation is defined as the change in output voltage from the nominal value due to chan ge in load current. note 4. regulation is measured at constant junction temperature by using a 1 0ms current pulse. devices are tested for load regulation in the load range from 10ma to 3.0a . note 5. for v out 1.0v, the v bias dropout specification doe s not apply due that the minimum v bias input is 3.0v. note 6. i gnd = i bias + (i in C i out ). the total current drawn from the supply is the sum of the load current plus the ground current.
tj49300 february 201 1 htc 7 typical characteristics dropout voltage (v in - v out ) vs. ou t put current d ropout voltage(v bias - v out ) vs. output current reference voltage vs. v in output voltage vs. v in bias current vs. v in bias current vs. output current 0 100 200 300 400 500 600 700 0 1 2 3 dropout voltage [mv] output current [a] vbias = 2.5v vbias = 3.1v vbias = 3.3v vbias = 5.0v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 0 1 2 3 dropout voltage [v] output current [a] 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 1 2 3 4 5 output voltage [v] input voltage [v] 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 1 2 3 4 5 output voltage [v] input voltage [v] iout=0.1a iout=3.0a 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 1 2 3 4 5 bias current [ma] input voltage [v] vbias = 3.3v vbias = 5.0v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 1 2 3 bias current [ma] output current [a]
tj49300 february 201 1 htc 8 reference voltage vs. temperature reference voltage vs. v bias time: 200us/div v in : 2.0v/div, v bias : 2.0v/div, v out : 0.5v/div, i out =1.0a time: 200us/div v in : 2.0v/div, v bias : 2.0v/div, v out : 0.5v/div, i out =0.5a v bias & v in start up transient response v in start up transient response time: 200us/div v bias : 2.0v/div, i out : 2.0a/div, v out : 0.5v/div, v in =2.5v v bias start up transient response 0.770 0.780 0.790 0.800 0.810 0.820 0.830 -40 0 40 80 120 output voltage [v] ambient temperature [ ] 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 1 2 3 4 5 output voltage [v] bias voltage [v] vbias iout vout vin vbias vout vin vbias vout
tj49300 february 201 1 htc 9 a pplication information the tj 49300 is a high performance, low dropout linear regulator, designed for high current application that requires fast transient response. the tj 49300 operates from two input supply voltages, significantly reducing dropout voltage. the tj 49300 is designed so tha t a minimum of external component are necessary. bias supply voltage the tj 49300 control circuitry is supplied by the bias pin which requires a very low bias current even at the maximum output current level. a bypass capacitor on the bias pin is recommended to improve the performance of the tj 49300 during line and load transient. a small ceramic capacitor from bias pin to ground reduces high frequency noise that could be injected into the control circuitry from the bias rail. in practical applications, a 1 f capacitor and smaller valued capacitors such as 0.01 f or 0.001 f in parall el with that larger capacitor may be used to decouple the bias supply. the bias input voltage must be 2.1v above the output voltage, with a minimum bias input voltage of 3 .0v. adjustable regulator design the tj 49300 adjustable version allows fixing outp ut voltage anywhere between 0.8 v and 2.0 v using two external resistors as presented in the typical application circuit. the resistor values are given by; ? ? ? ? ? ? ? ? ? = 1 0.8 v r2 r1 out it is suggested to use r1 values lower than 10k? to obtain better load transie nt performances. even, higher values up to 100 k? are suitable . enable the fixed output voltage version of tj 49300 feature an active high enable input(en) that allows on/off control of the regulator. the enable function of tj 49300 has hysteresis characteristics . the enable input allows on control of the regulator with the enable pin voltage of v bias x 0.7 . when the enable input voltage lowers under 0.4v , the enable input allows off control of the regulator. if not in used for logic control, en pin must be tied to bias voltage for proper operation. when a pull - up resistor is connected between en pin and v en signal(or v bias line), the resistance should be kept under 10 k? . the en pin must not be left at high impedance. supply power sequencing in common applications where the power on transient of in and bias voltages are not particularly fast(tr > 100us), no power sequencing is required. where voltage transient input is very fast(tr<100us), it is recommended to have the in voltage present before or, at least, at the same time as the bias voltage in order to avoid over voltage spikes during the power on transient. output capacitors the tj 49300 requires a minimum output capacitance to maintain stability. the tj 49300 is specifically designed to be stable with a ceramic chip, tantal um, and aluminum electrolytic capacitor. a 10f of ceramic chip capacitor or a 33 f tantal um or aluminum electrolytic capacitor wou ld satisfy most applications. its minimum value of ceramic chip capacitor is 1 f and of tantalum or aluminum electrolytic capacitor is 22 f . they might be increased if output current is high. input capacitor an input capacitor of minimum 1 f of chip ceramic capacitor and 10 f of tantal um or aluminum electrolytic
tj49300 february 201 1 htc 10 capacitor is recommended . larger values will help to improve ripple rejection by bypassing the input to the regulator, further improving the integrity of the output voltage. feed forward capacitor the tj49300 requires a feed forward capacitor to stabilize output in case of complicated transient load condition . it also performs a soft - start(ss) function on the output voltage. a 10nf is recommended to support its stability support function and its higher value will increase the time of ss function . maximum output current capability the tj 49300 can deliver a continuous current of 3.0a over the full operating junction temperature range. however, the output current is limited by the restriction of power dissipation which differs from packages. a heat sink may be required depending on the maximum power dissipation and maximum ambient tem perature of application. with respect to the applied package, the maximum output current of 3.0a may be still undeliverable due to the restriction of the power dissipation of tj 49300 . under all possible conditions, the junction temperature must be within the range specified under operating conditions. the temperatures over the device are given by : t c = t a + p d x ca / t j = t c + p d x jc / t j = t a + p d x ja w here t j is the junction temperature, t c is the case temperature, t a is the ambient temperature, p d is the total power dissipation of the device, ca is the thermal resistance of case - to - ambient, jc is the thermal resistance of junction - to - case, and ja is the thermal resistance of junction to ambient. the total power dis sipation of the device is given by: p d = p in C p out = {(v in x i in ) + (v bias x i bias )} C (v out x i out ) the maximum allowable temperature rise (t rmax ) depends on the maximum ambient temperature (t amax ) of the application, and the maximum allowable junction temperature (t jmax ): t rmax = t jmax C t amax the maximum allowable value for junction - to - ambient thermal resistance, ja , can be calculated using the formula: ja = t rmax / p d = (t jmax C t amax ) / p d tj 49300 is available in sop8 - p p, to252, and to263 packages. the thermal resistance depends on amount of copper area or heat sink, and on air flow. if proper cooling solution such as heat sink, copper plane area, air flow is applied, the maximum allowable power dissipation could be increased. however, i f the ambient temperature is increased, the allowable power dissipation would be decreased. the ja could be decreased with respect to the copper plane area. so, the specification of maximum power dissipation for an application is fixed, the proper coppe r plane area could be estimated by following graphs. w ider copper plane area leads lower ja . the maximum allowable power dissipation is also influenced by the ambient temperature. with the ja - copper
tj49300 february 201 1 htc 11 plane area relationship, the maximum allowable power dissipation could be evaluated with respect to the ambient temperature. as shown in graph, the higher copper plane area leads ja . and the higher ambient temperature leads lower maximum allowable power dissipation. all this relationship is based o n the aforesaid equation ; ja = t rmax / p d = (t jmax C t amax ) / p d the graph below is valid for the thermal resistance specified in the thermal information section on page 2. 0 0.5 1 1.5 2 2.5 3 0 20 40 60 80 100 120 140 allowable power dissipation [w] ambient temperature [ ] sop-8-pp to-252-5l to-263-5l
tj49300 february 201 1 htc 12 revision notice th e information in this datasheet can be revised without any notice to describe proper electrical characteristics.

▲Up To Search▲

Price & Availability of TJ49300GDP

	To Download TJ49300GDP Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .